| 1. |
The temperature dependence of carrier concentrations in doped semiconductors can be qualitatively described in Fig.1,
which shows the carrier concentraion of doped Si (1015donors/cm3)as a function
of 1/T. Three distinct regions I,II,and IIIcan be observed.
| a) | Explain what happens in these regions.(15%) |
| b) | Based in your discussion in a),do you think how the position of the Fermi level in a
doped semiconductor will be chabged with increasing temperature.(5%)
|
|
| |
|
| 2. |
Consider a spherical nonparabolic energy band with the energy as a function of wave vector given by

where m*0 is the effective mass at k=0 and a is the lattice constant .
| a) |
Calculate the group velocity vg as a function of k and plot vg
versus k over the range (8%)
|
| b) |
Calculate the effective mass m* as a function of k and plot m*
versus k over the range
|
|
| 3. |
Given that the condrctivity of an n-type semiconductor at 300k is 0.01(Ω-cm)-1 and that the mobility of
electrons is 1100 cm2/V-sec,calculate the concentrations of electrons and holes.(14%)
|
| 4. |
A uniformly, lightly doped n-type Si wafer shows a resistivity of 1 Ω-cm. This wafer is used to fabricate an abrupt PN junction with p-type doping. The p-type dopant density Na is 10 times higher than that in the n-type Si wafer. (assume electron mobility μn= 1350cm2/V-sec)
| (a) |
What is the built-in potential (Vbi) at the P-N junction? (5%) |
| (b) |
What is the depletion width (Wd) at zero bias? (5%) |
|
| 5. |
Consider a MOS capacitor consists of a p-type Si substrate (Na= 1.5x1015cm-3), a thin gate oxide layer (SiO2 thickness=20nm) and an Al metal gate (ψms= -0.9V) where positive fixed charge Qss= 1011cm-2, ni= 1010cm-3, kT= 0.0259eV, e= 1.6x10-19C, ε0= 8.85x10-14F/cm, εSi= 11.7 and εSiO2= 3.9.
| (a) |
What are the Cmax and Cmin of the capacitor in the high frequency capacitance v.s. gate voltage (C-V) measurement? (10%) |
| (b) |
Assume a very thin sheet of hot electrons (charge density= 10-8C/cm2) trapped in the gate oxide and located at 5nm from Si-SiO2 interface. What is the threshold voltage shift (ΔVt)? (5%) |
| (c) |
Find out the threshold voltage shift (ΔVt) due to the gate oxide (SiO2) thickness change from 20nm to 10nm. (5%) |
| (d) |
Find out the threshold voltage shift (ΔVt) due to the Si doping concentration (Na) change from 1015cm-3 to 1016cm-3. (5%) |
|
| 6. |
To design a LC-based voltage-control oscillator (VCO), a voltage-control varactor (variable capacitor Cx) is required as shown in the figure 2(A). Assume the resonant frequency is approximately equal to 1/2p(LxCx)1/2 where Lx= 22nH.
| (a) |
If a one-sided diode (P+-N) is used as a varactor (variable capacitor Cd, shown in the figure2(B) where Nd= 5x1015cm-3 and P-N junction cross-section area= 10-4cm2), estimate the reverse voltage (Vr) drop in the diode to operate the VCO at the resonant frequency of 1GHz. (5%) |
| (b) |
Qualitatively discuss the application of a MOS capacitor as a voltage-control varactor (Cx) in the VCO. And explain how the MOS capacitor works under bias conditions similar to Vr. (10%)
|
|