| 三. |
Consider the reference page sequence is 1 , 2 , 3 , 4 , 1 , 2 , 5 , 1 , 2 , 3 , 4 , 5 , and the
number of page frames is 3. Please answer the following page replacement questions.(12%)
| 1. |
How many page faults for First In First Out(FIFO)algorithm ? |
| 2. |
How many page faluts for Optimal Page Replacement algorithm ? |
| 3. |
Suppose we increase page frames to 4, how many page faults for FIFO
algorithm? What phenomenon will occur ? |
| 4. |
Do you think there exist optimal page replacement algorithm?why ? |
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| 四. |
Explain the relationship between the blocking and buffering techniques.(10%)
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| 五. |
Execution time can be used to characterize the performance of a processor
quantitatively. A simple model of execution time is as follows :
Execution time=Instructoin Count × Cycles perinstruction × Clock Cycle Time Based on this
formula, describe what can be done to improve the performance of a processor, and, for each
of the schemes, discuss the positive impacts as well as the negative impacts on execution
time.(15%)
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| 六. |
Discuss how peformance of a processor can be improved be applying pipelining
technique. What are the problems that cause a pipelined processor imperfect? What can be
done to reduce the degradation of performance?(10%)
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| 七. |
In designing a memory hierarchy for a computer system, a major task is to define,
between adjacent levels of hierarchy, the four operational
aspects : placement, identification, replacement and write policy. Describe the alternatives
of the aforementioned operations available in between cache and main memory.(15%)
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| 八. |
Describe the locality principle underlying the design of memory hierarchy.(10%) |